| 000 |
|
00996nam0 2200265 450 |
| 010 |
__ |
■a978-7-5643-3163-4■dCNY32.00 |
| 100 |
__ |
■a20150615d2014 em y0chiy0121 ea |
| 101 |
0_ |
■achi |
| 102 |
__ |
■aCN■b510000 |
| 105 |
__ |
■aak a 000yy |
| 106 |
__ |
■ar |
| 200 |
1_ |
■aEDA技术与Verilog HDL设计■f主编黄勇■AEDA ji shu yu Verilog HDL she j+...... |
| 210 |
__ |
■a成都■c西南交通大学出版社■d2014.07 |
| 215 |
__ |
■a239页■c图■d26cm |
| 320 |
__ |
■a有书目 (第239页) |
| 606 |
0_ |
■a电子电路■j教材■x计算机辅助设计■x应用软件■x高等学校■Adian zi dian lu |
| 606 |
0_ |
■a硬件描述语言■j教材■x程序设计■x高等学校■Aying jian miao shu yu yan |
| 610 |
0_ |
■aEDA■aVHDL语言■AEDA■AVHDL Yu Yan |
| 690 |
__ |
■aTN702-43■v4 |
| 690 |
__ |
■aTP312-43■v4 |
| 701 |
_0 |
■a黄勇■4主编■Ahuang yong |
| 801 |
_0 |
■aCN■bGSXY■c20150615 |
| 905 |
__ |
■aGSXY■fTN702-43/H396 |
| 999 |
__ |
■tC■Alwq■a20150615 15:23:56■Mlwq■m20150615 15:25:30 |
(共0票)
评价
