| 000 |
|
01297nam0 2200325 450 |
| 010 |
__ |
■a978-7-111-53728-1■dCNY89.00 |
| 100 |
__ |
■a20161014d2016 em y0chiy0121 ea |
| 101 |
1_ |
■achi■ceng |
| 102 |
__ |
■aCN■b110000 |
| 105 |
__ |
■aak a 000yy |
| 106 |
__ |
■ar |
| 200 |
1_ |
■a数字逻辑基础与Verilog设计■d= Fundamentals of digital logic with Ver+...... |
| 210 |
__ |
■a北京■c机械工业出版社■d2016 |
| 215 |
__ |
■aXI, 444页■c图■d26cm |
| 225 |
2_ |
■a国外电子与电气工程技术丛书■Aguo wai dian zi yu dian qi gong cheng ji sh+...... |
| 305 |
__ |
■a据原书第3版译出 |
| 320 |
__ |
■a有书目 |
| 410 |
_0 |
■12001■a国外电子与电气工程技术丛书 |
| 500 |
10 |
■aFundamentals of digital logic with Verilog design■mChinese |
| 606 |
0_ |
■a硬件描述语言■x程序设计■Aying jian miao shu yu yan |
| 606 |
0_ |
■a数字逻辑■Ashu zi luo ji |
| 690 |
__ |
■aTP312VH■v5 |
| 690 |
__ |
■aTP302.2■v5 |
| 701 |
_1 |
■a瓦拉纳西■g(Vranesic, Zvonko)■4著■Awa la na xi |
| 701 |
_1 |
■a布朗■g(Brown, Stephen)■4著■Abu lang |
| 702 |
_0 |
■a吴建辉■4译■Awu jian hui |
| 702 |
_0 |
■a黄成■4译■Ahuang cheng |
| 801 |
_0 |
■aCN■bGSXY■c20161016 |
| 905 |
|
■aGSXY■fTP302.2/B153b=3■g1240506■g1240507 |
| 999 |
__ |
■tC■Acj■a20161014 17:00:48■Mcj■m20161016 09:49:31 |